GaN-on-silicon transistors with reduced current collapse and improved blocking voltage by means of local substrate removal

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Abid, Idriss | Canato, Eleonora | Meneghini, Matteo | Meneghesso, Gaudenzio | Cheng, Kai | Medjdoub, F

Edité par HAL CCSD ; IOPScience - Japan Society of Applied Physics

International audience. We report on the demonstration of low trapping effects above 1200 V of GaN-on-silicon transistors using a local substrate removal (LSR) followed by a thick backside ultra-wide-bandgap AlN deposition. Substrate ramp measurements show reduced hysteresis up to 3000 V. It has been found that the LSR approach not only enable to extend the operation voltage capabilities of GaN-on-Silicon HEMTs with low on-resistance but also allow to reduce trapping effects directly affecting their dynamic behavior. This work points out that a large part of the electron trapping under high bias occurs at the AlN nucleation layer and Si substrate interface.

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